GK Question

technology medium mcq

Which packaging technology enables 3D stacking of chips for higher performance?

  1. Wire Bonding
  2. Flip-Chip
  3. Through-Silicon Via
  4. Plastic Encapsulation

Answer: Through-Silicon Via

TSV (Through-Silicon Via) creates vertical electrical connections through silicon dies, enabling 3D chip stacking for higher bandwidth, lower power, and smaller footprint. Critical for advanced packaging in HPC, mobile, and AI chips. India focuses on ATMP capabilities.

Topic Semiconductor Technology
Exam Relevance UPSC, Banking, SSC
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